Overcoming the Fermi-Level Pinning Effect in the Nanoscale Metal and Silicon Interface

Silicon-based photodetectors are attractive as low-cost and environmentally friendly optical sensors. Also, their compatibility with complementary metal-oxide-semiconductor (CMOS) technology is advantageous for the development of silicon photonics systems. However, extending responsivity silicon-based to mid-infrared (mid-IR) wavelength range remains challenging. In developing mid-IR infrared Schottky detectors, nanoscale metals critical. Nonetheless, one key factor Fermi-level pinning effect at metal/silicon interface presence metal-induced gap states (MIGS). Here, we demonstrate utilization passivated surface layer on semiconductor materials an insulating material in metal-insulator-semiconductor (MIS) contacts mitigate effect. The removal effectively reduces barrier height by 12.5% 16%. demonstrated devices exhibit a high up 234 μA/W 2 μm, 48.2 3 1.75 6 μm. corresponding detectivities μm 1.17 × 108 cm Hz1/2 W−1 2.41 107 W−1, respectively. expanded sensing contributes application future integration platforms.